Reset and Boot Process
4 - 6 TMS320F2837xD Microcontroller Workshop - Reset and Interrupts
Emulation Boot Mode
Emulation Boot Mode
(TRST = 1)
slide 1 of 2
If either EMU_KEY or EMU_BMODE
are invalid, the “wait” boot mode is
used. These values can then be
modified using the debugger and a
reset issued to restart the boot process.
Emulation Boot
Boot determined by
EMU_BOOTCTRL :
EMU_KEY and EMU_BMODE
Emulator Connected
EMU_KEY = 0x5A ?
Boot Mode
Wait
NO
YES
EMU_BMODE = 0xFE ?
CPU1 only
YES
NO
EMU_BMODE = 0xFF ?
Boot Mode
Emulate CPU1/2
Stand-Alone
YES
NO
Boot Mode
Parallel I/O
SCI-A
Wait
GetMode
GPIO 72 GPIO 84
0 0
0 1
1 0
1 1
Boot pins can be
mapped to any GPIO
pins. GetMode reads
Zx-BOOTCTRL (not
the boot pins).
Reads OTP for boot
pins and boot mode.
EMU_BOOTPIN1 EMU_BOOTPIN0 EMU_BMODE EMU_KEY
7 – 015 – 823 – 1631 – 24
CPU1 EMU_BOOTCTRL Register
reserved reserved EMU_BMODE EMU_KEY
7 – 015 – 823 – 1631 – 24
CPU2 EMU_BOOTCTRL Register
Emulation Boot Mode
(TRST = 1) slide 2 of 2
Boot Mode
Parallel I/O
SCI-A
GetMode
SPI-A
I2C-A
CAN-A
M0 RAM
FLASH
Wait
USB-0
SCI-A *
SPI-A *
I2C-A *
CAN-A *
EMU_BMODE =
0x00
0x01
0x03
0x04
0x05
0x07
0x0A
0x0B
other
0x0C
0x81
0x84
0x85
0x87
Boot Mode
FLASH
NO
Continued from
previous slide
YES
OTP_KEY = 0x5A ?
Boot Mode
Parallel I/O
SCI-A
SPI-A
I2C-A
CAN-A
M0 RAM
FLASH
USB-0
Wait
SCI-A *
SPI-A *
I2C-A *
CAN-A *
OTP_BMODE =
0x00
0x01
0x04
0x05
0x07
0x0A
0x0B
0x0C
other
0x81
0x84
0x85
0x87
* Alternate RX/TX GPIO
pin mapping for CPU1 only
Boot Mode
FLASH
Wait
OTP_BMODE =
0x0B
other
CPU1
GetMode
CPU1
&
CPU2
CPU2
GetMode
CPU1
only
In Emulation Boot mode, first the EMU_KEY bit fields are checked for a value of 0x5A. If either
EMU_KEY or EMU_BMODE bit fields are invalid, the “Wait” boot mode is entered. These bit field
values can then be modified using the debugger and then a reset is issued to restart the boot
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