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Control Law Accelerator (CLA)

TMS320F2837xD Microcontroller Workshop - Control Law Accelerator 9 - 7

CLA Registers

MCTL Control Register

LSxMSEL Memory Selection CPU/CLA Register

LSxCLAPGM CLA Program/Data Memory Register

CLA1TASKSRCSELx Task Source Select Register (x = 1-2)

MIFR Interrupt Flag Register

MIER Interrupt Enable Register

MIFRC Interrupt Force Register

MICLR Interrupt Flag Clear Register

MIOVF Interrupt Overflow Flag Register

MICLROVF Interrupt Overflow Flag Clear Register

MIRUN Interrupt Run Status Register

MVECTx Task x Interrupt Vector (x = 1-8)

MPC CLA 16-bit Program Counter

MARx CLA Auxiliary Register x (x = 0-1)

MRx CLA Floating-Point 32-bit Result Register (x = 0-3)

MSTF CLA Floating-Point Status Register

CLA Control Register

Cla1Regs.MCTL

HARDRESETIACKE SOFTRESETreserved

15 - 3 02 1

Hard Reset

0 = no effect

1 = CLA reset

(registers set

to default state)

Soft Reset

0 = no effect

1 = CLA reset

(stop current task)

IACK Enable

0 = CPU IACK instruction ignored

1 = CPU IACK instruction triggers a task

Texas Instruments TMS320F2837 D Series Workshop Guide And Lab Manual

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