EasyManuals Logo

Texas Instruments TMS320F2837 D Series Workshop Guide And Lab Manual

Texas Instruments TMS320F2837 D Series
324 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #207 background imageLoading...
Page #207 background image
TMS320F2837xD Microcontroller Workshop - Direct Memory Access 8 - 1
Direct Memory Access
Introduction
This module explains the operation of the direct memory access (DMA) controller. The DMA has
six channels with independent PIE interrupts.
Module Objectives
Module Objectives
Understand the operation of the
Direct Memory Access (DMA)
controller
Show how to use the DMA to transfer
data between peripherals and/or
memory without intervention from
the CPU
The DMA module provides a hardware method of transferring data between peripherals and/or
memory without intervention from the CPU, effectively freeing up the CPU for other functions.
Each CPU subsystem has its own DMA and using the DMA is ideal when an application requires
a significant amount of time spent moving large amounts of data from off-chip memory to on-chip
memory, or from a peripheral such as the ADC result register to a memory RAM block, or
between two peripherals. Additionally, the DMA is capable of rearranging the data for optimal
CPU processing such as binning and “ping-pong” buffering.
Specifically, the DMA can read data from the ADC result registers, transfer to or from memory
blocks G0 through G15, IPC RAM, EMIF, transfer to or from the McBSP and SPI, and also modify
registers in the ePWM. A DMA transfer is started by a peripheral or software trigger. There are
six independent DMA channels, where each channel can be configured individually and each
DMA channel has its own unique PIE interrupt for CPU servicing. All six DMA channels operate
the same way, except channel 1 can be configured at a higher priority over the other five
channels. At its most basic level the DMA is a state machine consisting of two nested loops and
tightly coupled address control logic which gives the DMA the capability to rearrange the blocks of
data during the transfer for post processing. When a DMA transfers is completed, the DMA can
generate an interrupt

Table of Contents

Other manuals for Texas Instruments TMS320F2837 D Series

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Texas Instruments TMS320F2837 D Series and is the answer not in the manual?

Texas Instruments TMS320F2837 D Series Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS320F2837 D Series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals