Oscillator/PLL Clock Module
5 - 6 TMS320F2837xD Microcontroller Workshop - System Initialization
Dual-Core CPU Select Registers
Register PeripheralName
CPUSEL0 EPWM1, EPWM2, EPWM3, EPWM4, EPWM5, EPWM6, EPWM7, EPWM8, EPWM9, EPWM10, EPWM11, EPWM12
CPUSEL1 ECAP1, ECAP2, ECAP3, ECAP4, ECAP5, ECAP6
CPUSEL2 EQEP1, EQEP2, EQEP3
CPUSEL4 SD1, SD2
CPUSEL5 SCI_A, SCI_B, SCI_C, SCI_D
CPUSEL6 SPI_A, SPI_B, SPI_C
CPUSEL7 I2C_A, I2C_B
CPUSEL8 CAN_A, CAN_B
CPUSEL9 McBSP_A, McBSP_B
CPUSEL11 ADC_A, ADC_B, ADC_C, ADC_D
CPUSEL12 CMPSS1, CMPSS2, CMPSS3, CMPSS4, CMPSS5, CMPSS6, CMPSS7, CMPSS8
CPUSEL14 DAC_A, DAC_B, DAC_C
DevCfgRegs.CPUSELx.bit.PeripheralName = 0
0 = connected to CPU1 (default) 1 = connected to CPU2
CPU1.SYSCLK
Peripheral
0
1
CPU2.SYSCLK
Note: DEVCFGLOCK1 register can be used to lock above registers (lock bit for each register)
Note: CPUSELx must be configured before PCLKCRx
The dual-core CPU select register selects either CPU1 or CPU2 as the clock source for each
peripheral. The peripheral clock control register allows individual peripheral clock signals to be
enabled or disabled. If a peripheral is not being used, its clock signal could be disabled, thus
reducing power consumption.
Peripheral Clock Control Registers
Register PeripheralName
PCLKCR0 CLA1, DMA, CPUTIMER0, CPUTIMER1, CPUTIMER2, HRPWM, TBCLKSYNC, GTBCLKSYNC
PCLKCR1 EMIF1, EMIF2
PCLKCR2 EPWM1, EPWM2, EPWM3, EPWM4, EPWM5, EPWM6, EPWM7, EPWM8, EPWM9, EPWM10, EPWM11, EPWM12
PCLKCR3 ECAP1, ECAP2, ECAP3, ECAP4, ECAP5, ECAP6
PCLKCR4 EQEP1, EQEP2, EQEP3
PCLKCR6 SD1, SD2
PCLKCR7 SCI_A, SCI_B, SCI_C, SCI_D
PCLKCR8 SPI_A, SPI_B, SPI_C
PCLKCR9 I2C_A, I2C_B
PCLKCR10 CAN_A, CAN_B
PCLKCR11 McBSP_A, McBSP_B, USB_A
PCLKCR12 uPP_A
PCLKCR13 ADC_A, ADC_B, ADC_C, ADC_D
PCLKCR14 CMPSS1, CMPSS2, CMPSS3, CMPSS4, CMPSS5, CMPSS6, CMPSS7, CMPSS8
PCLKCR16 DAC_A, DAC_B, DAC_C
Note: CPUSYSLOCK1 register can be used to lock above registers (lock bit for each register)
CpuSysRegs.PCLKCRx.bit.PeripheralName = 1
CPUx.SYSCLK
Peripheral Clock
Module Enable Clock Bit 0 = disable
(default)
1 = enable
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