Analog Devices adsp-2100 User Manual

E Control/Status Registers
E – 6
Memory-Mapped Registers
Flag Out (read-only)
1514131211109876543210
ISCLK
Internal Serial Clock Generation
RFSR
Receive Frame Sync Required
TFSR
Transmit Frame Sync Required
TFSW
Transmit Frame Sync Width
RFSW
Receive Frame Sync Width
IRFS
Internal Receive Frame Sync Enable
INVTFS
Invert Transmit Frame Sync
INVRFS
Invert Receive Frame Sync
SLEN (Serial Word Length – 1)
DTYPE Data Format
00=right justify, zero-fill unused MSBs
01=right justify, sign-extend into unused MSBs
10=compand using µ-law
11=compand using A-law
ITFS
Internal Transmit Frame Sync Enable
000000000000000
DM(0x3FF2)
SPORT1 Control Register
SPORT1 SCLKDIV
Serial Clock Divide Modulus
1514131211109876543210
1514131211109876543210
SPORT1 RFSDIV
Receive Frame Sync Divide Modulus
DM(0x3FF0)
DM(0x3FF1)
SCLK frequency
RFS frequency
RFSDIV = – 1SCLKDIV = – 1
CLKOUT frequency
2
*
(SCLK frequency)

Analog Devices adsp-2100 Specifications

General

Brand	Analog Devices
Model	adsp-2100
Category	Computer Hardware
Language	English