NGT—Technical description (2011/2012)
NGT Transceiver System Technical Service Manual 113
RF unit—PA PCB transmit path
Gain control stage
The RF input is passed to T200, which turns the RF drive into push-pull. This is applied
to the variable gain stage V200 and V201. The FETs V202 and V203 are used as variable
resistors depending on the ALC voltage applied to the gates.
If there is no power output at the antenna connector, 5 V of ALC voltage is applied to the
gates, so that the resistance is low and the gain is at maximum. As the output from the PA
increases to the power set point (100 W or 125 W), the ALC voltage drops, thus
increasing the resistance in the FETs and so reducing the gain of V200 and V201 and
keeping the Tx output power at the set level (100 W or 125 W). V16 and V17 switch
between 100 W and 125 W. When V17 is on, the output power is 100 W. When V17 is
off, the output power is 125 W.
The overall gain of the PA is set to a constant value by R205 (PA GAIN).
Pre-driver stage
The levelled RF from the gain control stage is passed via T201 to the Class A push-pull
amplifier formed by V204 and V205. L202 and C207 provide a small amount of gain
peaking to ensure the overall gain is flat with frequency.
Driver stage
The signal from the pre-driver stage goes via T202 to the driver stage. The driver is a
Class B push-pull amplifier that provides a current drive to the output stage.
V207 and V208 have collector to base feedback to flatten the gain. R273 balance control
varies the gain slightly in V208, which is used to balance the second harmonic (see
page 185, Adjusting balance control).
The bias for the driver stage, provided by V214 and V206, and set by R222 (DR. BIAS),
is applied to the centre tap of T202.
The signal from the pre-driver stage goes via T202 to the driver stage. The driver is a
Class B push-pull amplifier that provides a current drive to the output stage.
V207 and V208 have drain to gate feedback to allow balance adjustment to the second
harmonic (see page 185, Adjusting balance control).
The bias for the driver FET is provided to each gate individually via R222 (DR BIAS 1)
and R235 (DR BIAS 2) from the temperature-compensated reference IC201/A.
Drawing 04-03369, or
Drawing 04-03542
Drawing 04-03369, or
Drawing 04-03542
ALTERNATIVE TEXT
Drawing 04-03369
ALTERNATIVE TEXT
Drawing 04-03542
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