Motorola MPC823e - Page 1020

LCD Controller
MOTOROLA MPC823e REFERENCE MANUAL 18-23
LCD CONTROLLER
18
PON—Panel On
0 = The LCD controller operation is disabled.
1 = The LCD controller operation is enabled.
18.4.2 LCD Horizontal Control Register
The 32-bit, memory-mapped, read/write LCD horizontal control register (LCHCR) holds the
panel horizontal pixel resolution and other configuration parameters.
Bits 0–6—Reserved
These bits are reserved and must be set to 0.
BO—Byte Order
0 = The PowerPC little-endian convention is used for byte ordering (swapped
operation) and is also called little-endian byte ordering. The transmission order of
bytes within a buffer word is reversed in comparison to the Motorola mode. This
mode is supported only for 32-bit port size memory. Motorola byte ordering (normal
operation) is also called big-endian byte ordering. As data is transmitted onto the
serial line from the data buffer, the most-significant byte of the buffer word contains
data to be transmitted earlier than the least-significant byte of the same buffer
word.
1 = Big/little-endian byte ordering. As data is transmitted onto the serial line from the
data buffer, the least-significant byte of the buffer double-word contains data to be
transmitted earlier than the most-significant byte of the same buffer double-word.
AT—Address Type
This field contains values that you want to appear on the AT pins when the associated
SDMA channel accesses memory. AT0 is always driven to 1. Refer to
Section 13.4.7.3.4 Address Space Attributes for address type descriptions.
LCHCR
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD RESERVED BO AT HPC
RESET 0000
R/W R/W R/W R/W R/W
ADDR (IMMR & 0xFFFF0000) + 0x 844
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD HPC WBL
RESET 00
R/W R/W R/W
ADDR (IMMR & 0xFFFF0000) + 0x 846