Motorola MPC823e - MMU Tablewalk Special Register; MMU Data Content-Addressable Registers

Memory Management Unit
MOTOROLA MPC823e REFERENCE MANUAL 11-37
MEMORY MANAGEMENT
11
UNIT
11.6.1.13 MMU TABLEWALK SPECIAL REGISTER. The MMU tablewalk special
(M_TW) register is used as a scratch register in the software tablewalk interrupt handler.
11.6.2 MMU Data Content-Addressable Registers
The MD_CAM, MD_RAM0, and MD_RAM1 registers are interface registers that allow you
to read the data memory management unit CAM and RAM entries. If you try to write to the
MD_CAM register using the mtspr instruction, the CAM and RAM values of the entry
indexed by the DTLB_INDX field to MD_CAM, MD_RAM0, and MD_RAM1 will be loaded.
The source register in the mtspr instruction can be any register, since its value is not used.
The values of the MD_CAM, MD_RAM0, and MD_RAM1 registers can be read using the
mfspr instruction. If you try to write to the MD_RAM0 and MD_RAM1 registers using the
mtspr instruction, it will be considered a NOP (no operation) instruction.
M_TW
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
RESET M_TW
R/W R/W
ADDR SPR 799
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
RESET M_TW
R/W R/W
ADDR SPR 799
NOTE: — = Undefined.