Motorola MPC823e User Manual

Memory Management Unit
11-16 MPC823e REFERENCE MANUAL MOTOROLA
MEMORY MANAGEMENT
11
UNIT
11.6.1 Control Registers
11.6.1.1 MMU INSTRUCTION CONTROL REGISTER. The MMU instruction control
register (MI_CTR) is a special register that is used to control the operation of the instruction
memory management unit.
GPM—Group Protection Mode
0 = PowerPC mode.
1 = Domain manager mode.
PPM—Page Protection Mode
0 = Page resolution protection.
1 = 1K resolution protection for a 4K page.
CIDEF—CI Default
Default value for instruction cache-inhibit attribute when the instruction MMU is disabled
(MSR
IR
= 0).
Bits 3 and 5—Reserved
These bits are reserved and must be set to 0. Ignored on write and returns a 0 on read.
RSV4I—Reserve Four Instruction TLB Entries
0 = ITLB_INDX decremented modulo 32.
1 = ITLB_INDX decremented modulo 28.
PPCS—Privilege/Problem State Compare Mode
0 = Ignore problem/privilege state during address compare.
1 = Consider problem/privilege state according to MI_RPN[24:27].
Bits 7–18—Reserved
These bits are reserved and must be set to 0. Ignored on write and returns a 0 on read.
MI_CTR
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD
GPM PPM CIDEF RES RSV2I RES PPCS RESERVED
RESET
0000000 0
R/W
R/W R/W R/W R/W R/W R/W R/W R/W
ADDR
SPR 784
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD
RESERVED ITLB_INDX RESERVED
RESET
00 0
R/W
R/W R/W R/W
ADDR
SPR 784

Motorola MPC823e Specifications

General

Brand	Motorola
Model	MPC823e
Category	Computer Hardware
Language	English