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Motorola MPC823e - MMU Data RAM Entry Read Register 0

Motorola MPC823e
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Memory Management Unit
MOTOROLA MPC823e REFERENCE MANUAL 11-39
MEMORY MANAGEMENT
11
UNIT
PS—Page Size
000 = 4K.
001 = 16K.
011 = 512K.
111 = 8M.
010 = Reserved.
100 = Reserved.
101 = Reserved.
110 = Reserved.
SH—Shared Page
0 = This entry matches only if the ASID field in the data TLB entry matches the value
of the M_CASID register.
1 = ASID comparison is disabled for the entry.
ASID—Address Space ID
This field is the address space ID of the TLB entry to be compared with the CASID field of
the M_CASID register.
11.6.2.2 MMU DATA RAM ENTRY READ REGISTER 0. The MMU data RAM entry read
register 0 (MD_RAM0) contains the physical page number and page attributes of an entry
indexed by the DTLB_INDX field of the MD_CTR. This register is only updated when you
write a value to it.
RPN—Real Page Number
These bits are the most-significant bits of the page’s physical address.
MD_RAM0
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD RPN
RESET
R/W R
ADDR SPR 825
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD RPN PS APGI G WT CI RESERVED
RESET ———0
R/W RRRRRRR
ADDR SPR 825
NOTE: — = Undefined.

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