MOTOROLA
MPC823e REFERENCE MANUAL
3-1
MEMORY MAP
3
SECTION 3
MEMORY MAP
This section discusses the internal memory map (including key registers) of the MPC823e.
Each memory resource is mapped within a contiguous block of 16K storage. The location of
this block within the global 4G real storage space can be mapped on 64K resolution through
an implementation specific special register called the internal memory map register (IMMR).
Refer to
Section 12.12.1.2 Internal Memory Map Register
for more information.
Table 3-1. MPC823e Internal Memory Map
INTERNAL
ADDRESS REGISTER
SIZE
(IN BITS)
PAGE NUMBER
LOCATION
SYSTEM INTERFACE UNIT
000 SIUMCR—SIU Module Configuration Register 32
12-30
004 SYPCR—System Protection Control Register 32
12-35
008 to 00D RES—Reserved —
—
00E SWSR—Software Service Register 16
12-27
010 SIPEND—SIU Interrupt Pending Register 32
12-7
014 SIMASK—SIU Interrupt Mask Register 32
12-8
018 SIEL—SIU Interrupt Edge/Level Register 32
12-9
01C SIVEC—SIU Interrupt Vector Register 32
12-10
020 TESR—Transfer Error Status Register 32
12-36
024 to 02F RES—Reserved —
—
030 SDCR—SDMA Configuration Register 32
16-85
034 to 07F RES—Reserved —
—
PCMCIA
080 PBR0—PCMCIA Interface Base Register 0 32
17-16
084 POR0—PCMCIA Interface Option Register 0 32
17-17
088 PBR1—PCMCIA Interface Base Register 1 32
17-16
08C POR1—PCMCIA Interface Option Register 1 32
17-17
090 PBR2—PCMCIA Interface Base Register 2 32
17-16
094 POR2—PCMCIA Interface Option Register 2 32
17-17
098 PBR3—PCMCIA Interface Base Register 3 32
17-16