Memory Management Unit
MOTOROLA MPC823e REFERENCE MANUAL 11-21
MEMORY MANAGEMENT
11
UNIT
11.6.1.6 MMU INSTRUCTION REAL PAGE NUMBER REGISTER. The MMU instruction
real page number (MI_RPN) register contains the physical address and the storage
attributes of an entry to be loaded into a translation lookaside buffer. This register must be
written after the MI_EPN and MI_TWC registers are written.
RPN—Real Page Number
These bits are the most-significant bits of the page’s physical address.
PP1—Protection for the First 1K Subpage in a 4K Page
This field contains protection code for the first subpage in a 4K page. Depending on Bit 22
of the PP2 field, the same protection code has different protection schemes.
MI_RPN
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD RPN
RESET —
R/W R/W
ADDR SPR 790
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD RPN PP1 PP2 PP3 PP4 LPS SH CI V
RESET — ————————
R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
ADDR SPR 790
NOTE: — = Undefined. The default values depend on the state of system memory.
4K PAGES WITH 1K RESOLUTION PROTECTION
PP1
SETTING
INSTRUCTION PAGES
PRIVILEGED MODE PROBLEM MODE
00 No access No access
01 Executable No access
10 Executable Executable
11 Executable Executable
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