Memory Management Unit
MOTOROLA MPC823e REFERENCE MANUAL 11-49
MEMORY MANAGEMENT
11
UNIT
11.8 MANIPULATING THE TRANSLATION LOOKASIDE BUFFER
11.8.1 Reloading the Translation Lookaside Buffer
The TLB reload (tablewalk) function is performed in the software with optional hardware
assistance in the following ways:
• Automatically stores the missed effective data or instruction address and default
attributes in the MI_EPN or MD_EPN registers, respectively. This value is loaded into
the selected entry on a write to MI_RPN or MD_RPN for the instruction and data
translation lookaside buffer.
• Automatically updates the replacement location counter to point to the entry to be
replaced. This value is placed in the xTLB_INDX field of the MI_CTR and MD_CTR.
• Generates a level one pointer when a mfspr Rx, M_TWB is performed by the
concatenation of the level one table base and level one index. See Figure 11-2 and
Figure 11-3 for details.
• Generates a level two pointer when a mfspr Rx, MD_TWC is performed by the
concatenation of the level two table base and level two index.
• Performs a write to the TLB entry by loading the tablewalk level two entry value to the
MI_RPN or MD_RPN register.
• A special register (M_TW) is available for the software tablewalk routine, in addition to
the PowerPC architecture’s special registers (SPRG0–SPRG3). Using this register
allows for more efficient interrupt handling.