Motorola MPC823e

Memory Management Unit
11-50 MPC823e REFERENCE MANUAL MOTOROLA
MEMORY MANAGEMENT
11
UNIT
11.8.1.1 TRANSLATION RELOAD EXAMPLES. The following are code examples for
generating the real page number using a two-level tree page table structure. The first
example is for a data TLB reload and the second is for an instruction TLB reload. Notice that
the following assumptions are made:
• M_TWB holds the base pointer to the first level table.
• Both instruction and data address translation is turned off (MSR
IR
=0 and MSR
DR
=0).
dtlb_swtw mtspr M_TW, R1 # save R1
mfspr R1, M_TWB # load R1 with level one pointer
lwz R1, (R1) # Load level one page entry
mtspr MD_TWC,R1 # save level two base pointer and
# level one attributes
mfspr R1, MD_TWC # load R1 with level two pointer
# while taking into account the
# page size
lwz R1, (R1) # Load level two page entry
mtspr MD_RPN, R1 # Write TLB entry
mfspr R1, M_TW # restore R1
rfi
itlb_swtw mtspr M_TW, R1 # save R1
mfspr R1, SRR0 # load R1 with instruction miss
# effective address (the same data
# may be taken from the MI_EPN
# register)
mtspr MD_EPN, R1 # save instruction miss effective
# address in MD_EPN
mfspr R1, M_TWB # load R1 with level one pointer
lwz R1, (R1) # Load level one page entry
mtspr MI_TWC,R1 # save level one attributes
mtspr MD_TWC,R1 # save level two base pointer
mfspr R1, MD_TWC # load R1 with level two pointer
# while taking into account the
# page size
lwz R1, (R1) # Load level two page entry
mtspr MI_RPN, R1 # Write TLB entry
mfspr R1, M_TW # restore R1
rfi