System Interface Unit
MOTOROLA MPC823e REFERENCE MANUAL 12-25
SYSTEM INTERFACE UNIT
12
12.8.3 Periodic Interrupt Timer Register
The periodic interrupt timer register (PITR) is a read-only register that shows the current
value in the periodic interrupt down counter. Writes to this register do not affect this register
and reads of this register do not have any affect on the counter.
PIT—Periodic Interrupt Timing Count
This field contains the current count remaining for the periodic timer. Writes have no effect
on this field.
Bits 16–31—Reserved
These bits are reserved and must be set to 0.
PITR
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD PIT
RESET —
R/W R
ADDR (IMMR & 0xFFFF0000) + 0x248
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD RESERVED
RESET 0
R/W R
ADDR (IMMR & 0xFFFF0000) + 0x24A
NOTE: — = Undefined.