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Motorola MPC823e
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Development Capabilities and Interface
20-4
MPC823e REFERENCE MANUAL
MOTOROLA
DEVELOPMENT
20
CAPABILITIES & INTERFACE
The status pins are divided into two groups—the instruction queue status and the history
buffer flush status.
VF[0:2]—Visible Instruction Queue Flushes Status
Instruction queue status denotes the type of the last fetched instruction or the number
of instructions that were flushed from the instruction queue. These status pins are used
for both functions because queue flushes only happen in clocks with no fetch type
information to be reported, as shown in Table 20-1.
000 = None.
001 = 1 instruction was flushed from the instruction queue.
010 = 2 instructions were flushed from the instruction queue.
011 = 3 instructions were flushed from the instruction queue.
100 = 4 instructions were flushed from the instruction queue.
101 = 5 instructions were flushed from the instruction queue.
110 = Reserved.
111 = Special case. See
Section 20.2.1.1 The Internal Hardware
.
VFLS[0:1]—Visible History Buffer Flushes Status
History buffer flushes status indicates the number of instructions that are flushed from
the history buffer on this clock.
00 = None.
01 = One instruction was flushed from the history buffer.
10 = Two instructions were flushed from the history buffer.
11 = Used for debug mode indication and must be ignored by the program trace
external hardware. For details, refer to
Section 20.4.2 Debug Mode
.
Table 20-1. VF Instruction Type Encoding
VF INSTRUCTION TYPE VF NEXT CLOCK WILL HOLD
000 None More instruction type information
001 Sequential
010 Branch (direct or indirect) not taken
011 VSYNC was asserted/negated and therefore the next
instruction will be marked with the program trace cycle
attribute
100 Interrupt/exception taken, the target will be marked with
the program trace cycle attribute
Queue flush information
2
101 Branch indirect taken,
rfi
,
mtmsr
,
isync
and in some
cases
mtspr
, the target will be marked with the program
trace cycle attribute
1
110 Branch direct taken
111 Branch (direct or indirect) not taken
NOTE: Unless the next clock has the VF pin set to 111, refer to
Section 20.2.1.1 The Internal Hardware
.

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