MPC823e Instruction Set—addis
MOTOROLA MPC823e REFERENCE MANUAL B-13
INSTRUCTION SET
B
addis
Assembler Syntax addis rD,rA,SIMM)
Definition Add Immediate Shifted
Operation if rA = 0 then rD " EXTS(SIMM || (16)0)
else rD " (rA) + EXTS(SIMM || (16)0)
Description The sum (rA|0) + (SIMM || 0x0000) is placed into rD.
The addis instruction is preferred for addition because it sets
few status bits. Note that addis uses the value 0, not the
contents of GPR0, if rA = 0.
Other registers altered:
❏ None
Simplified mnemonics:
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD 15 D A
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD SIMM
lis rD,value
equivalent to
addis rD,0,value
subis rD,rA,value
equivalent to
addis rD,rA,–value
POWERPC ARCHITECTURE
LEVEL
SUPERVISOR
LEVEL
OPTIONAL FORM
UISA D