MPC823e Instruction Set—andis.
MOTOROLA MPC823e REFERENCE MANUAL B-19
INSTRUCTION SET
B
andis.
Assembler Syntax andis. rA,rS,UIMM
Definition AND Immediate Shifted
Operation rA ← (rS) + (UIMM || (16)0)
Description The contents of rS are ANDed with UIMM || 0x0000 and the
result is placed into rA.
Other registers altered:
❏ Condition Register (CR0 field):
Affected: LT, GT, EQ, SO
BIT 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
FIELD 29 S A
BIT 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
FIELD UIMM
POWERPC ARCHITECTURE
LEVEL
SUPERVISOR
LEVEL
OPTIONAL FORM
UISA D
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