Motorola MPC823e - Page 149

The PowerPC Core
6-18 MPC823e REFERENCE MANUAL MOTOROLA
CORE
6
638 10011 11110 IMMR Yes Write - As a Store
560 10001 10000 IC_CSR Yes Write - As a Store
561 10001 10001 IC_ADR Yes Write - As a Store
562 10001 10010 IC_DAT Yes Write - As a Store
568 10001 11000 DC_CSR Yes Write - As a Store
569 10001 11001 DC_ADR Yes Write - As a Store
570 10001 11010 DC_DAT Yes Write - As a Store
784 11000 10000 MI_CTR Yes Write - As a Store
786 11000 10010 MI_AP Yes Write - As a Store
787 11000 10011 MI_EPN Yes Write - As a Store
789 11000 10101 MI_TWC
(MI_L1DL2P)
Yes Write - As a Store
790 11000 10110 MI_RPN Yes Write - As a Store
816 11001 10000 MI_CAM Yes Write - As a Store
817 11001 10001 MI_RAM0 Yes Write - As a Store
818 11001 10010 MI_RAM1 Yes Write - As a Store
792 11000 11000 MD_CTR Yes Write - As a Store
793 11000 11001 M_CASID Yes Write - As a Store
794 11000 11010 MD_AP Yes Write - As a Store
795 11000 11011 MD_EPN Yes Write - As a Store
796 11000 11100 M_TWB
(MD_L1P)
Yes Write - As a Store
797 11000 11101 MD_TWC
(MD_L1DL2P)
Yes Write - As a Store
798 11000 11110 MD_RPN Yes Write - As a Store
799 11000 11111 M_TW
(M_SAVE)
Yes Write - As a Store
824 11001 11000 MD_CAM Yes Write - As a Store
825 11001 11001 MD_RAM0 Yes Write - As a Store
826 11001 11010 MD_RAM1 Yes Write - As a Store
NOTES: 1. See Section 6.3.4.1 Restartability After An Interrupt.
2. Refer to Section 20.6.2 Development Port Registers.
3. Protection of registers with “debug” privileges is described in Section 20.6.1 Protecting the
Development Port Registers.
4. This register is a fetch-only register. Using mtspr is ignored and using mfspr gives an undefined value.
Table 6-9. Additional Special-Purpose Registers (Continued)
SPR REGISTER
NAME
PRIVILEGED SERIALIZE ACCESS
DECIMAL SPR
5:9
SPR
0:4