TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
MOTOROLA
MPC823e REFERENCE MANUAL
xv
16.4.2.5 Timer Capture Registers .............................................16-81
16.4.2.6 Timer Counter Registers .............................................16-81
16.4.2.7 Timer Event Registers ................................................16-82
16.4.3 Initializing the Timers ..............................................................16-82
16.5 The SDMA Channels ........................................................................16-83
16.5.1 SDMA Bus Arbitration and Transfers .....................................16-85
16.5.2 The SDMA Registers ..............................................................16-86
16.5.2.1 SDMA Configuration Register .....................................16-86
16.5.2.2 SDMA Status Register ................................................16-88
16.5.2.3 SDMA Mask Register .................................................16-89
16.5.2.4 SDMA Address Register .............................................16-90
16.6 Emulating IDMA ................................................................................16-90
16.6.1 Features .................................................................................16-91
16.6.2 IDMA Interface Signals ...........................................................16-91
16.6.2.1 DREQx
and SDACKx .................................................16-91
16.6.3 IDMA Operation ......................................................................16-91
16.6.3.1 AutoBuffer and Buffer Chaining ..................................16-92
16.6.3.2 IDMA Parameter RAM Memory Map ..........................16-93
16.6.3.3 IDMA Status Registers ...............................................16-95
16.6.3.4 IDMA Mask Registers .................................................16-96
16.6.3.5 IDMA Buffer Descriptors .............................................16-97
16.6.3.6 IDMA Commands .....................................................16-101
16.6.3.7 Starting IDMA ...........................................................16-102
16.6.3.8 Requesting IDMA Transfers .....................................16-102
16.6.3.9 Level-Sensitive Mode ...............................................16-102
16.6.3.10 Edge-Sensitive Mode ................................................16-102
16.6.3.11 IDMA Operand Transfers ..........................................16-103
16.6.3.11.1 Transfer Identification ...................................16-103
16.6.3.11.2 Dual-Address Mode .....................................16-103
16.6.3.11.3 Single-Address Mode (Fly-By Transfers) .....16-104
16.6.3.11.4 Single-Buffer Burst Fly-By Mode ..................16-106
16.6.3.12 IDMA Status Registers .............................................16-110
16.6.3.13 IDMA Mask Registers ...............................................16-111
16.6.3.14 Single-Buffer Timing .................................................16-111
16.6.3.15 DownLoad Sequence ...............................................16-112
16.6.3.16 Bus Exceptions .........................................................16-113
16.7 The Serial Interface with Time-Slot Assigner ..................................16-113
16.7.1 Features ...............................................................................16-115
16.7.2 Configuring the Time-Slot Assigner ......................................16-115
16.7.3 Enabling Connections to the Time-Slot Assigner .................16-118
16.7.4 Serial Interface RAM Operation ...........................................16-118
16.7.4.1 One Multiplexed Channel with Static Frames ...........16-119
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