Motorola MPC823e

TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
MOTOROLA MPC823e REFERENCE MANUAL xix
16.9.19.11 SCCx ASYNC HDLC Controller Errors .....................16-278
16.9.19.12 Programming the SCCx ASYNC HDLC Controller....16-279
16.9.19.12.1 SCC ASYNC HDLC Mode Register .............16-279
16.9.19.12.2 SCCx ASYNC HDLC Receive Buffer
Descriptor ......................................................16-280
16.9.19.12.3 SCCx ASYNC HDLC Transmit Buffer
Descriptor ......................................................16-284
16.9.19.12.4 SCCx ASYNC HDLC Event Register ...........16-284
16.9.19.12.5 Differences Between HDLC and
ASYNC HDLC ...............................................16-286
16.9.19.12.6 SCCx ASYNC HDLC Programming Guide ...16-286
16.9.20 The SCC2 in IrDA Mode .......................................................16-287
16.9.20.1 Low-speed IrDA Protocol ..........................................16-288
16.9.20.2 Middle-Speed IrDA Protocol .....................................16-289
16.9.20.3 High-Speed IrDA Protocol ........................................16-290
16.9.20.3.1 4PPM Data Encoding ...................................16-290
16.9.20.3.2 Data Link Layer ............................................16-291
16.9.20.4 Serial Infrared Interaction Pulses ..............................16-293
16.9.20.5 Programming Model .................................................16-294
16.9.20.5.1 SCC2 Infrared Mode Register ......................16-294
16.9.20.5.2 SCC2 Infrared Serial Interaction Pulse
Control Register ............................................16-296
16.9.20.5.3 Low-Speed IrDA Programming Guide ..........16-297
16.9.20.5.4 Middle-Speed IrDA Programming
Example ........................................................16-298
16.9.20.5.5 High-Speed IrDA Programming Example .....16-300
16.9.21 The SCCx in Transparent Mode ..........................................16-301
16.9.21.1 Features ....................................................................16-302
16.9.21.2 SCCx Transparent Channel Frame Transmission
Process .....................................................................16-302
16.9.21.3 SCCx Transparent Channel Frame Reception
Process .....................................................................16-303
16.9.21.4 Achieving Synchronization in Transparent Mode ......16-303
16.9.21.4.1 Inline Synchronization Pattern .....................16-304
16.9.21.4.2 External Synchronization Signals .................16-305
16.9.21.4.3 Transparent Synchronization Example ........16-306
16.9.21.5 SCCx Transparent Parameter RAM Memory Map ....16-307
16.9.21.6 SCCx Transparent Commands .................................16-307
16.9.21.7 SCCx Transparent Controller Errors .........................16-309
16.9.21.8 SCCx Transparent Mode Register ............................16-309
16.9.21.9 SCCx Transparent Receive Buffer Descriptor ..........16-310
16.9.21.10 SCCx Transparent Transmit Buffer Descriptor .........16-312