Motorola MPC823e - Page 253

Memory Management Unit
MOTOROLA MPC823e REFERENCE MANUAL 11-35
MEMORY MANAGEMENT
11
UNIT
When read, this bit returns MD_EPN[10:19] when MD_CTR
TWAM
= 1 and MD_EPN[12:21]
when MD_CTR
TWAM
= 0.
PS—Page Size
When written, this field has the following settings and is set to 0 on a data TLB miss. When
this field is read, it returns a zero.
00 = Small (4K or 16K).
01 = 512K.
11 = 8M.
10 = Reserved.
When read, this field returns MD_EPN[10:19] when MD_CTR
TWAM
= 1 and MD_EPN[12:21]
when MD_CTR
TWAM
= 0.
WT—Writethrough
When written, this bit has the following settings and is set to 1 on a data TLB miss. When
this bit is read, it returns a zero.
0 = Copyback data cache policy page entry.
1 = Writethrough data cache policy page entry.
V—Valid
When written, this bit has the following settings and is set to 1 on a data TLB miss. When
this bit is read, it returns a zero.
0 = Entry is invalid.
1 = Entry is valid.