Motorola MPC823e - Page 352

External Bus Interface
MOTOROLA MPC823e REFERENCE MANUAL 13-45
EXTERNAL BUS
13
INTERFACE
When a burst access is initiated by the MPC823e, the bus interface only recognizes the
RETRY
assertion as a retry termination if it detects it before the first data beat is
acknowledged by the slave device. When the RETRY
signal is asserted as a termination
signal on the second or third data beat of the access, the MPC823e recognizes it as a
transfer error acknowledgement. If a “non burst” access to a small port size device is
initiated by the MPC823e, the transfer size of the access is bigger than the slave port size,
and the first transfer of this access is normally acknowledged by the assertion of TA
, the
MPC823e initiates the following “single beat” transfers to complete the access and
recognize the RETRY
assertion as a transfer error acknowledge.
Figure 13-30. Retry On Burst Cycle
CLKOUT
A[6:31]
TS
BR
BG(OUTPUT)
BB
DATA
TA
RD/WR
BURST
TSIZ[0:1]
RETRY
AA
ALLOW EXTERNAL MASTER
TO GAIN THE BUS
BI
IF ASSERTED WILL
CAUSE TRANSFER ERROR