Memory Controller
MOTOROLA
MPC823e REFERENCE MANUAL
15-55
MEMORY CONTROLLER
15
MEMORY CONTROLLER
15
15.5.4.2.2 Chip-Select Signals.
The MS field in the base register of the accessed memory
bank selects a user-programmable machine on the currently requested cycle. The selected
UPM only affects the assertion and negation of the appropriate CSx
signal and its timing is
specified in the UPM RAM word. Figure 15-28 illustrates how the CSx
signals are controlled
by the UPMs.
Figure 15-28. CSx
Signal Selection
Note:
The UPM refresh is done in a round robin manner. If more than one chip-select
uses the same UPM, the refreshes will progress through each one. For example,
if you have three chip-selects using UPMA, you would need to set the periodic
timer A period to one-third the normal refresh.
UPMA
UPMB
GPCM
MUX
SWITCH
BANK SELECTED
MS[0:1] IN BRx
CS0
CS1
CS2
CS3
CS4
CS5
CS6
CS7
MS[0:1]
00
01
10
11
MACHINE
GPCM
UPMA
UPMB
—
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