LIST OF ILLUSTRATIONS (Continued)
Figure Page
Number Title Number
MOTOROLA
MPC823e REFERENCE MANUAL
xli
20-9. Asynchronous Clocked Serial Communications Timing Diagram ................20-33
20-10. Synchronous Self-Clocked Serial Communications Timing Diagram ..........20-34
20-11. Enabling Clock Mode Following Reset Timing Diagram ..............................20-35
20-12. Download Procedure Code Example ...........................................................20-39
20-13. Slow Download Procedure Loop ..................................................................20-40
20-14. Fast Download Procedure Loop ...................................................................20-40
Section 21
IEEE 1149.1 Test Access Port
21-1. Test Logic Block Diagram ..............................................................................21-2
21-2. TAP Controller State Machine ........................................................................21-3
21-3. Output Pin Cell (O.Pin) ...................................................................................21-4
21-4. Observe-Only Input Pin Cell (I.Obs) ...............................................................21-5
21-5. Output Control Cell (IO.CTL) ..........................................................................21-5
21-6. General Arrangement of Bidirectional Pin Cells .............................................21-6
21-7. Bypass Register ...........................................................................................21-20
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