LIST OF TABLES (Continued)
Table Page
Number Title Number
MOTOROLA
MPC823e REFERENCE MANUAL
xliv
6-10. Other Control Registers .................................................................................6-19
6-11. Encoding Special Registers Located Outside the Core .................................6-19
6-12. Load/Store Instructions Timing ......................................................................6-30
6-13. Value Summary of the DAR, BAR, and DSISR Registers ............................6-31
Section 7
PowerPC Architecture Compliance
7-1. Offset of First Instruction by Interrupt Type ......................................................7-8
Section 8
Instruction Execution Timing
8-1. Instruction Execution Timing ............................................................................8-1
Section 11
Memory Management Unit
9-1. Number of Effective Address Bits Replaced By Real Address Bits ...............11-8
10-1. Number of Identical Entries Required in the Level One Table .......................11-8
11-1. Number of Identical Entries Required in the Level Two Table .......................11-8
Section 12
System Interface Unit
12-1. Priority of System Interface Unit Interrupt Sources ........................................12-6
12-2. Multiplexing Control ......................................................................................12-29
Section 13
External Bus Interface
13-1. Bus Interface Signals .....................................................................................13-4
13-2. Data Bus Requirements For Read Cycles ...................................................13-26
13-3. Data Bus Contents for Write Cycles .............................................................13-27
13-4. BURST/TSIZE Encoding ..............................................................................13-33
13-5. Address Space Definitions ...........................................................................13-34
13-6. Termination Signal Protocol .........................................................................13-46
Section 14
Endian Modes
14-1. Little-Endian Effective Address Modification For Individual Aligned
Scalar .............................................................................................................14-1
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