Motorola MPC823e - Page 55

Introduction
MOTOROLA MPC823e REFERENCE MANUAL 1-7
INTRODUCTION
1
Figure 1-1. MPC823e Block Diagram
EXTENDED
POWERPC
CORE
INSTRUCTION
INT_BIU
EXT_BIU
MEMORY CONTROLLER
E_BUS
INSTRUCTION
SYSTEM FUNCTIONS
SYSTEM INTERFACE UNIT
PCMCIA INTERFACE
LCD
DATA MMU DATA CACHE
TIMERS
MASTER
INTERRUPT
CONTROLLER
SLAVE
PARALLEL I/O
DUAL-PORT
SCC2 SMC1 SMC2
I
2
C
USB SPI
SERIAL INTERFACE AND TIME-SLOT ASSIGNER
RISC MICROCONTROLLER
PERIPHERAL BUS
CPM LOCAL BUS
ALU
CRC
REGISTER FILE
MAC
SEQUENCER ROM
RAM
BAUD RATE GENERATORS
COMMUNICATION
INTERFACE
INTERFACE
PROCESSOR
CORE
INTERFACE
CACHE
MMU
SCC3