Communication Processor Module
16-142 MPC823e REFERENCE MANUAL MOTOROLA
SERIAL
I/F
COMMUNICATION
16
PROCESSOR MODULE
Bits 0–1 and 8–9—Reserved
These bits are reserved and must be set to 0.
VTA, VTB, VRA, and VRB—Time-Slot Valid Bits for Serial Interface RAM Entries
The VTx or VRx bit in each entry shows that the entry is valid, which is helpful when the
corresponding pointer entry value is zero. Additionally, the VTx or VRx bit saves you from
having to read both the SIRP and the SISTR registers to obtain the information you need.
The pointer values are based on the value of the RDM field in the SIGMR.
Bits 16–17 and 24–25—Reserved
These bits are reserved and must be set to 0.
TAPTR, TBPTRRAPTR, and RBPTR—Serial Interface RAM Time-Slot Pointers
In all cases, the value of the TxPTR or RxPTR fields increment by one for each entry that
the serial interface processes. Since each TxPTR and RxPTR is 5 bits each, the values in
each field can range from 0 to 31, corresponding to 32 different serial interface RAM entries.
The full pointer range may not necessarily be used. For instance, if the last bit is set in the
fifth serial interface RAM entry, then the pointer only reflects values from 0 to 4, but once the
fifth entry is processed by the serial interface, the pointer is reset to 0.
16.7.5.6.1 SIRP Indication When RDM = 00. You cannot signify 64 entries with a single 5-
bit pointer. Two 5-bit pointers are used instead: one for the first 32 entries and one for the
last 32 entries. If the corresponding VTx or VRx bit is set, then:
• RxPTR contains the address of the currently active RX RAM entry. When the serial
interface services entries 1–32, RAPTR is incremented and RBPTR is continuously
cleared. When the serial interface services entries 33–64, RAPTR is continuously
cleared and RBPTR is incremented.
• TxPTR contains the address of the currently active TX RAM entry. When the serial
interface services entries 1–32, TAPTR is incremented and TBPTR is continuously
cleared. When the serial interface services entries 33–64, TAPTR is continuously
cleared and TBPTR is incremented.
To Next Page
Loading...
