EasyManua.ls Logo

Motorola MPC823e - Page 780

Motorola MPC823e
1353 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Communication Processor Module
16-326
MPC823e REFERENCE MANUAL
MOTOROLA
SCCs
COMMUNICATION
16
PROCESSOR MODULE
16.9.22.7 SCCx ETHERNET PARAMETER RAM MEMORY MAP.
When a serial
communication controller is configured to operate in Ethernet mode, it overlays the structure
used in Table 16-24 onto the parameters described in Table 16-30.
Table 16-30. SCCx Ethernet Parameter RAM Memory Map
ADDRESS NAME WIDTH DESCRIPTION
SCCx Base + 30
C_PRES
Word Preset CRC
SCCx Base + 34
C_MASK
Word Constant MASK for CRC
SCCx Base + 38
CRCEC
Word CRC Error Counter
SCCx Base + 3C
ALEC
Word Alignment Error Counter
SCCx Base + 40
DISFC
Word Discard Frame Counter
SCCx Base + 44
PADS
Half-word Short Frame PAD character
SCCx Base + 46
RET_LIM
Half-word Retry Limit Threshold
SCCx Base + 48 RET_CNT Half-word Retry Limit Counter
SCCx Base + 4A
MFLR
Half-word Maximum Frame Length Register
SCCx Base + 4C
MINFLR
Half-word Minimum Frame Length Register
SCCx Base + 4E
MAXD1
Half-word Max DMA1 Length Register
SCCx Base + 50
MAXD2
Half-word Max DMA2 Length Register
SCCx Base + 52 MAXD Half-word RX Max DMA
SCCx Base + 54 DMA_CNT Half-word RX DMA Counter
SCCx Base + 56 MAX_B Half-word Max Buffer Descriptor Byte Count
SCCx Base + 58
GADDR1
Half-word Group Address Filter 1
SCCx Base + 5A
GADDR2
Half-word Group Address Filter 2
SCCx Base + 5C
GADDR3
Half-word Group Address Filter 3
SCCx Base + 5E
GADDR4
Half-word Group Address Filter 4
SCCx Base + 60 TBUF0_DATA0 Word Save Area 0–Current Frame
SCCx Base + 64 TBUF0_DATA1 Word Save Area 1–Current Frame
SCCx Base + 68 TBUF0_RBA0 Word Save RBA–Current Frame
SCCx Base + 6C TBUF0_CRC Word Save CRC–Current Frame
SCCx Base + 70 TBUF0_BCNT Half-word Save BCNT–Current Frame
SCCx Base + 72
PADDR1_L*
Half-word Physical Address 1 (LSB)
SCCx Base + 74
PADDR1_M*
Half-word Physical Address 1
SCCx Base + 76
PADDR1_H*
Half-word Physical Address 1 (MSB)
SCCx Base + 78
P_PER
Half-word Persistence
SCCx Base + 7A RFBD_PTR Half-word RX First Buffer Descriptor Pointer
SCCx Base + 7C TFBD_PTR Half-word TX First Buffer Descriptor Pointer
SCCx Base + 7E TLBD_PTR Half-word TX Last Buffer Descriptor Pointer

Table of Contents

Related product manuals