Motorola MPC823e - Page 8

TABLE OF CONTENTS (Continued)
Paragraph Page
Number Title Number
vi MPC823e REFERENCE MANUAL MOTOROLA
8.2.4 A Full History Buffer ...................................................................8-8
8.2.5 Branch Folding ...........................................................................8-9
8.2.6 Branch Prediction .....................................................................8-10
Section 9
Instruction Cache
9.1 Features ................................................................................................9-1
9.2 Programming the Instruction Cache .....................................................9-4
9.2.1 Instruction Cache Control and Status Register ..........................9-5
9.2.2 Instruction Cache Address Register ...........................................9-6
9.2.3 Instruction Cache Data Port Register .........................................9-7
9.3 Instruction Cache Operation .................................................................9-7
9.3.1 Instruction Cache Hit ..................................................................9-7
9.3.2 Instruction Cache Miss ...............................................................9-8
9.3.3 Instruction Fetch On A Predicted Path .......................................9-8
9.4 instruction Cache Commands ...............................................................9-8
9.4.1 Invalidating the Instruction Cache ..............................................9-9
9.4.2 Loading and Locking the Instruction Cache .............................9-10
9.4.3 Unlocking A Line ......................................................................9-10
9.4.4 Unlocking the Entire Instruction Cache ....................................9-11
9.4.5 Inhibiting the Instruction Cache ................................................9-11
9.4.6 Instruction Cache Read ............................................................9-12
9.4.7 Instruction Cache Write ............................................................9-14
9.5 Restrictions .........................................................................................9-14
9.6 Instruction Cache Coherency ..............................................................9-14
9.7 Updating Code And Memory Region Attributes ..................................9-14
9.8 Reset Sequence .................................................................................9-14
9.9 Debug Support ....................................................................................9-15
9.9.1 Fetching Instructions From The Development Port ..................9-15
Section 10
Data Cache
10.1 Features ..............................................................................................10-1
10.2 Organization of the Data Cache ..........................................................10-2
10.3 Programming the Data Cache ............................................................10-3
10.3.1 PowerPC Architecture Instructions ..........................................10-3
10.3.1.1 PowerPC User Instruction Set Architecture (Book I).....10-3
10.3.1.2 PowerPC Virtual Environment Architecture (Book II) ....10-4
10.3.1.3 PowerPC Operating Environment Architecture
(Book III) .......................................................................10-4