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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 3
Interrupts
Overview III - 9
Interrupt Acceptance Operation (hardware processing)
When an interrupt is accepted, the LSI executes the following sequence by hardware.
1. Stack Pointer (SP) is updated.
SP-6
SP
2. PSW.BKD is set to "1". (The bank function is disabled.)
3. MEMCTR.MIESET is copied to PSW.MIE.
MEMCTR.MIESET
PSW.MIE
4. LV1-0 of the accepted interrupt is copied to PSW.IM1-0.
LV1-0
PSW.IM1-0
5. PSW and PC -i.e., the return address- are saved to the stack.
PSW
Address (SP)
PC bit 7 to 0
Address (SP + 1)
6. The remaining PC is saved to the stack.
PC bits 15 to 8
Address (SP + 2)
PC bits 19 to 16, and H
Address (SP + 3)
7. HA is saved to the stack.
Lower half of HA
Address (SP + 4)
Upper half of HA
Address (SP + 5)
8. The hardware branches program to the address in the vector table.
Figure:3.1.5 Stack Operation during Interrupt Acceptance
PSW
70
PC7 to 0
PC15 to 8
New SP
(after interrupt
acceptance)
Lower
Address
Higher
Old SP
(before interrupt
acceptance)
PC
19 to 16
HA7 to 0
HA15 to 8
PCH
Reserved

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