Panasonic MN101L Series

Chapter 3
Interrupts
III - 8 Overview
 Explanation of PSW.MIE and PSW.IM1-0
PSW.MIE is set to "0" when:
• MEMCTR.MIESET is "0", and NMI or a maskable interrupt is accepted.
• PSW.MIE is set to "0" by software.
• BE instruction is executed (BKD and MIE are set to "0".)
• the LSI is reset.
PSW.MIE is set to "1" when:
• MEMCTR.MIESET is "1", and NMI or a maskable interrupt is accepted.
• PSW.MIE is set to "1" by software.
• BD instruction is executed (BKD and MIE is set to "1".).
PSW.IM1-0 change when:
• PSW.IM1-0 is set by software.
• the LSI is reset.
• an maskable interrupt is accepted, and the value of PSW.IM1-0 changes to the value of xICR.IL1-0.
When RTI instruction executes, PSW.IM1-0 go back to the value of it before the interrupt acceptance.
• NMI is accepted, and PSW.IM1-0 change to "00".
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When an interrupt is accepted, PSW.MIE changes as follows.
-When MEMCTR.MIESET is "1", PSW.MIE is set to "1".
-When MEMCTR.MIESET is "0", PSW.MIE is set to "0".
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NMI has priority over maskable ones.
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Refer to [Chapter 20 20.2 Instruction set] for BE and BD instructions.
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