Chapter 4
Clock/ Mode/ Voltage Control
Clock Control IV - 7
High-speed Oscillation Clock Control Register (HCLKCNT: 0x03F05)
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The HCLKSEL must be set while the CPU is in NORMAL or IDLE mode, and both the HOSC-
CNT and the HRCCNT are "1". At this time, HOSCCLK and HRCCLK must be stable.
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bp765432 1 0
Bit name HCLKSEL FCNT1-0 - Reserved Reserved HOSCCNT HRCCNT
Initial value011011 0 0
AccessR/WR/WR/WR/WR/WR/W R/W R/W
bp Bit name Description
7 HCLKSEL
High-speed oscillation clock select
0: Internal high-speed oscillation
1: External high-speed oscillation
Select internal high-speed oscillation (set the bit from 1 to 0) when HRC-
CNT = 1.
6-5 FCNT1-0
Internal High-speed oscillation frequency select
00: 1 MHz
01: Setting is prohibited.
10: 8 MHz
11: 10 MHz
4 - Always read as "0"
3-2 Reserved Always set to "111".
1 HOSCCNT
External high-speed oscillation circuit control
0: Disabled (General-purpose port selected)
1: Enabled (OSC1/OSC2 selected)
0 HRCCNT
Internal high-speed oscillation circuit control
0: Disabled
1: Enabled