Chapter 4
Clock/ Mode/ Voltage Control
IV - 8 Clock Control
Low-speed Oscillation Clock Control Register (SCLKCNT: 0x03F06)
..
The SCLKSEL must be set while both the SOSCCNT and the SRCCNT are "1".
At this time, HOSCCLK and HRCCLK must be stable.
When changing the SCLKSEL in Normal mode, the following wait time must be ensured
before disable the clock oscillation to be stopped.
Wait time: (two cycles of the external low-speed oscillation) +
(two cycles of the internal low-speed oscillation)
When changing the SCLKSEL in Slow mode, the above wait time is not needed.
..
bp 765432 1 0
Bit name SCLKSEL - - - - Reserved SOSCCNT SRCCNT
Initial value000001 1 1
AccessR/WRRRRR/WR/WR/W
bp Bit name Description
7 SCLKSEL
Low-speed oscillation clock select
0: Internal low-speed oscillation
1: External low-speed oscillation
6-3 - Always read as "0000".
2 Reserved Always set to "1".
1 SOSCCNT
External low-speed oscillation circuit control
0: disabled
1: enabled
0 SRCCNT
Internal low-speed oscillation circuit control
0: disabled
1: enabled
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