Panasonic MN101L Series

Chapter 9
16-bit Timer
IX - 44 16-bit Timer Capture Function
 Capture Operation with a Trigger of an Interrupt of Timer 0 or 1 (Timer 7 and Timer 8)
A capture trigger of the input capture function is generated at an interrupt signal of Timer 0 or 1.
Figure:9.8.3 Capture Count Timing with a Trigger of an Interrupt of Timer 0 or 1 (Timer 7 and Timer 8)
..
A capture trigger is generated at an interrupt signal of Timer 0 or 1 when setting the
TMnMD2.TnICT1-0 to "11". Set TMnMD2 and TMnMD4 to select the capture trigger. When
selecting the Timer 0 or 1 interrupt as a capture trigger, the selected edge is invalid.
..
..
A capture trigger is generated by sampling the interrupt signal of Timer 0 or 1 at the capture
clock.
Therefore, the edge of the external interrupt input signal may not be detected when an inter-
val of interrupt input signal is shorter than capture clock cycle. To prevent this, please set
count clock of Timer 0 or Timer 1 to be slower than the capture clock cycle.
..
N
0113 0114 5555
5556
C
ount
c
lock
T
MnEN
b
it
C
ompare
r
egister 1
B
inary
c
ounter
C
apture
r
egister
5557 5558 N-1
N
0000 0001 0111
0112
N
01140000
C
apture
t
rigger
T
imer 0, 1
i
nterrupt
5558