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Panasonic MN101L Series

Panasonic MN101L Series
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Chapter 10
General-Purpose Time Base/Free-Running Timer
X - 10 8-bit Free-running Timer
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Stop the timer when switching the count clock. If the count clock is changed during counting,
the timer doesn't count correctly.
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When the timer 6 binary counter (TM6BC) is read on the operation, uncertain value on count-
ing up may be read.
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Writing the value to the timer 6 compare register (TM6OC) during counting is prohibited.
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The sampled signal of the TM6EN/TBEN bit with the count clock controls start/stop of the
binary counter of the timer 6 and the time base timer on this LSI. Therefore, note the follow-
ing two points:
I. To read the binary counter value after the timer has stopped, set the TM6EN bit to "0", wait
for 1 count cycle, and read the value.
When reading the value without waiting for 1 count cycle, use the program to read the value
of the binary counter multiple times. In this case, the read value is [count value - 1].
II. When changing the timer setting (clock selection, function switching, etc.), wait for 1 count
clock after setting the TM6EN/TBEN bit to "0" to stop the timer. Then, Restart the timer.
If the setting is switched during the timer operation, the timer operation is not guaranteed.
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When the binary counter reaches the setting value of the compare register, the interrupt
request is set and the binary counter is cleared at the next count clock.
So set the compare register as follows:
the value of compare register setting = (the counts till the interrupt request generation) - 1
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If the TM6CLRS bit of the TM6MD register is set to "0", TM6BC can be initialized every time
the value of TM6OC register is rewritten. However, in that state, the timer 6 interrupt is dis-
abled. If you use the timer 6 interrupt, set the TM6CLRS bit to "1" after rewriting the value of
the TM6OC register.
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On the timer 6 clock source selection, if the time base timer output is selected, the clock
setup of the time base timer is necessary.
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