Chapter 14
DMA Controller
XIV - 6 DMA Controller Control Registers
DMA Control Register 0 upper side (DMCTR0H: 0x03E01)
bp76543210
Bit name - - DMUT - DMTM - DMDAM -
At reset00000000
Access R R R/W R R/W R R/W R
bp Bit name Description
7-6 - Always read as "0".
5DMUT
Data transmission unit
0: 8-bit
1: 16-bit
4 - Always read as "0".
3DMTM
Transfer mode
0: Burst transfer
1: Single transfer
2 - Always read as "0".
1DMDAM
Destination Address increment control
0: Enable (Incremented)
1: Disable (Fixed)
0 - Always read as "0".