<Record of Changes - 4>
IV-6 Note 1 - Description addition - Set the PSW.MIE to "0" before chang-
ing the data of CPU or CKCTR...
Note 2 - Description addition - The instruction for changing the data of
CPUM or CKCTR must not be exe-
cuted in the internal RAM.
IV-12 4.1.2 - Specification addition - 4.1.2 Change of the External Low-
speed Oscillation Capability
IV-13 - - Description deletion 4.2.1 Overview
NORMAL Mode
...
IDLE Mode
-
IV-14 Figure:4.2.2 - Description addition - (*) When SCLKCNT.SOSCCNT = 1,
SOSCCLK starts. ...
IV-16 Figure:4.2.6 - Description change (Set the CPUM as described in Table:
4.2.1)
(Set the CPUM as described in Table:
4.1.3)
IV-17 Figure:4.2.7 - Description change Figure: 4.2.7 Transition Flow from RC
Mode to OSC Mode
Figure: 4.2.7 Clock Change Flow from
SRCCLK to SOSCCLK
Figure:4.2.8 - Description change Figure: 4.2.8 Transition Flow from
OSC Mode to RC Mode
Figure: 4.2.8 Clock Change Flow from
SOSCCLK to SRCCLK
IV-18 Figure:4.2.9 - Writing error correction HALT/STOP mode
← Watchdog timer
HALT0/1/4: stop counting
HALT2/STOP: clear counting
NORMAL/SLOW mode
← Watchdog timer
HALT0/1/4: restart counting
HALT2/STOP: start counting
HALT/STOP mode
← Watchdog timer
HALT0/1/2/3: continue counting
STOP: stop counting
NORMAL/SLOW mode
← Watchdog timer
HALT0/1/2/3: continue counting
STOP: restart counting
IV-19 Figure:4.2.10 - Writing error correction Figure: 4.2.10 Transition Flow Diagram
from CPU Operating Mode to HALT0/
HALT1 Mode
Figure: 4.2.10 Transition from CPU
Operating Mode to HALT0/HALT1/
HALT2 Mode
IV-20 Figure:4.2.11 - Description change HALTMOD = 1
HALT = 1
Set the CPUM as described in Table
4.1.3
- - Description deletion <Note 1>
If it can’t be guaranteed that ...
<Note 2>
Insert 3 NOP instructions right after ...
-
Note - Description change If priority level of the interrupt to be
used is not equal to or higher than the
mask level ...
If the value of xICR.LV1-0 for an inter-
rupt to be used as a return factor is
equal or larger ...
IV-21 Figure:4.2.12 - Description change STOP = 1 Set the CPUM as described in Table
4.1.3
- - Description deletion <Note 1>
If it can’t be guaranteed that ...
<Note 2>
Insert 3 NOP instructions right after ...
-
Note - Description change If priority level of the interrupt to be
used is not equal to or higher than the
mask level ...
If the value of xICR.LV1-0 for an inter-
rupt to be used as a return factor is
equal or larger ...
IV-23 Figure:4.2.14 - Writing error correction ← When returning from STOP mode,
wait for oscillation to stabilize
NORMAL/SLOW mode
← Watchdog timer
HALT0/1/2/3: continue counting
HALT2/STOP: restart counting
← When the transition corresponds to
(*1) in Figure: 4.2.1, the oscillation
stabilization wait time is inserted.
NORMAL/SLOW mode
← Watchdog timer
HALT0/1/2/3: continue counting
STOP: restart counting
IV-23 Note 3 - Description addition - The instruction for the transition to
STANDBY mode must not be executed
in the internal RAM.
Modification (Ver.1.3)
Definition
Details of Revision
Page Title Line Ver.1.2 Ver.1.3
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