Samsung S3F84B8 - Page 66

S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS
4-2
Address and
Location
RESET Value (Bit) Register Name Mnemonic
Address R/W 7 6 5 4 3 2 1 0
Port 0 control register (Low byte) P0CONL E5H R/W 0 0 – – 0 0 0 0
Port 0 interrupt pending register P0PND E6H R/W – 0 0 0 0 – 0 0
Port 1 control register P1CON E7H R/W – – 0 0 0 0 0 0
Port 2 control register (High byte) P2CONH E8H R/W 0 0 0 0 0 0 0 0
Port 2 control register (Low byte) P2CONL E9H R/W 0 0 0 0 0 0 0 0
Comparator 0 control register CMP0CON EAH R/W – – – 0 0 0 1 0
Comparator 1 control register CMP1CON EBH R/W 0 0 0 0 0 0 1 0
Comparator 2 control register CMP2CON ECH R/W 0 0 0 0 0 0 1 0
Comparator 3 control register CMP3CON EDH R/W 0 0 0 0 0 0 1 0
Comparator interrupt control register CMPINT EEH R/W 1 1 1 1 1 1 1 1
PWM control register PWMCON EFH R/W 0 0 0 0 0 0 0 0
PWM CMP register PWMCCON F0H R/W – – – – 0 0 0 0
PWM delay trigger data register PWMDL F1H R/W 0 0 0 0 0 0 0 0
PWM preset data register (High byte) PWMPDATAH F2H R/W 0 0 0 0 0 0 0 0
PWM preset data register (Low byte) PWMPDATAL F3H R/W – – – – – – 0 0
PWM data register (High byte) PWMDATAH F4H R/W 0 0 0 0 0 0 0 0
PWM data register (Low byte) PWMDATAL F5H R/W – – – – – – 0 0
Anti-mis-trigger data register AMTDATA F6H R/W 1 1 1 1 1 1 1 1
Buzzer control register BUZCON F7H R/W 0 0 0 0 0 0 0 0
A/D converter data register (High byte) ADDATAH F8H R x x x x x x x x
A/D converter data register (Low byte) ADDDATAL F9H R – – – – – – x x
A/D control register ADCON FAH R/W 0 0 0 0 0 0 0 0
Locations FB-FCH are not mapped
Basic timer counter BTCNT FDH R 0 0 0 0 0 0 0 0
Location FEH is not mapped
Interrupt priority register IPR FFH R/W x x x x x x x x
NOTE: –: Not mapped or not used, x: Undefined