Schweitzer Engineering Laboratories SEL-787 - Page 538

J.10
SEL-787 Relay Instruction Manual Date Code 20081022
Relay Word Bits
Definitions
PMTRIG Trigger for synchrophasors. 35
RB01–RB08 Remote Bits 01 through 08. 46
RB09–RB16 Remote Bits 09 through 16. 47
RB17–RB24 Remote Bits 17 through 24. 48
RB25–RB32 Remote Bits 25 through 32. 49
RBADA Channel A, outage duration over threshold. 74
RBADB Channel B, outage duration over threshold. 74
REF1E Internal enable for the REF element. 3
REF1F REF element forward (internal) fault declaration. 3
REF1P Restricted earth fault inverse-time O/C element timed-out. 3
REF1R REF element reverse (external) fault declaration. 3
RELAY_EN Relay Data Quality Flag. 37
REMTRIP Remote Trip. 9
RMBnA Channel A receive mirror bits RMB1A through RMB8A. 70
RMBnB Channel B receive mirror bits RMB1B through RMB8B. 72
ROKA Channel A, received data ok. 74
ROKB Channel B, received data ok. 74
RSTDEM Reset demand meter. 27
RSTENRGY Reset Energy metering. Assert when the SEL
OGIC control equation RSTENRG result is
logical 1.
27
RSTMXMN Reset Max Min metering. Assert when the SEL
OGIC control equation RSTMXMN result is
logical 1.
27
RSTPKDEM Reset peak demand meter. 27
RSTTRGT SEL
OGIC control equation: reset trip logic and targets when asserted. 28
RTDA Asserts when any RTD alarm (RTD_A) is asserted. 28
RTDFLT Asserts when an open or short circuit condition is detected on any enabled RTD input, or
communication with the external RTD module has been interrupted.
28
RTDIN Indicates status of contact connected to SEL-2600A RTD module. 28
RTDnA RTD1A through RTD4A (Alarms). 29
RTDnA RTD5A through RTD8A (Alarms). 30
RTDnA RTD9A through RTD12A (Alarms). 31
RTDnT RTD1T through RTD4T (Trips). 29
RTDnT RTD5T through RTD8T (Trips). 30
RTDnT RTD9T through RTD12T (Trips). 31
RTDT Asserts when any RTD trip (RTD_T) is asserted. 8
SALARM Software Alarms: invalid password, changing access levels, settings changes. 25
SCnnQD SEL
OGIC Counters 01 through 08 asserted when counter = 0. 63
SCnnQD SEL
OGIC Counters 09 through 16 asserted when counter = 0. 65
SCnnQD SEL
OGIC Counters 17 through 24 asserted when counter = 0. 67
SCnnQD SEL
OGIC Counters 25 through 32 asserted when counter = 0. 69
SCnnQU SEL
OGIC Counters 01 through 08 asserted when counter = preset value. 62
SCnnQU SEL
OGIC Counters 09 through 16 asserted when counter = preset value. 64
Table J.2 Relay Word Bit Definitions for the SEL-787 (Sheet 7 of 9)
Bit Definition Row