4-12 Loss-of-Potential, Load Encroachment, and Directional Element Logic Date Code 990430
SEL-351P Manual Técnico
Figure SECTION 4: .6: Internal Enable (32VE) Logic for Zero-Sequence
Voltage-Polarized, Residual-Current Directional Element
50NR
50NF
|I
N
|
50GRP/10
50GFP/10
"V" in setting
ORDER
E32IV
32QGE
32VE
32NE
to Figure
4.11
Relay
Word
Bit
Relay
Word
Bits
DWG: M351R152
setting enable
Relay
Word
Bits
SEL
OGIC
Setting
settings
(internal
enable)
SEL
OGIC
enable
(see
Figure 4.6)
to Figure
4.8
Figure SECTION 4: .7: Internal Enable (32NE) for Zero-Sequence Voltage-
Polarized, Neutral-Current Directional Element
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