IEC 1131-3 Instructions
10-19
S7-200 Programmable Controller System Manual
A5E00066097-02
These functions affect the following Special Memory bits: SM1.0 (zero); SM1.1
(overflow); SM1.2 (negative); SM1.3 (divide-by-zero)
If SM1.1 (overflow bit) is set, then the other math status bits are cleared and the
output operand is not altered. For integer operations, if SM1.3 is set during a divide
operation, the other math status bits are left unchanged and the original input
operands are not altered. Otherwise, all supported math status bits contain valid
status upon completion of the math operation.
Inputs/Outputs Operands Data Types
IN1, IN2 VW, IW, QW, MW, SW, SMW, LW, AIW, T, C, VD, ID, QD, MD,
SMD, SD, LD, HC, AC, Constant, *VD, *AC, *LD
INT, DINT, REAL
OUT VW, IW, QW, MW, SW, SMW, T, C, LW, VD, ID, QD, MD, SMD,
SD, LD, AC, *VD, *AC, *LD
INT, DINT, REAL
Note
Real or floating-point numbers are represented in the format described in the
ANSI/IEEE 754-1985 standard (single-precision). Refer to the standard for more
information.
Math Examples
Network 1
LAD
FBD
%I0.0
Application
OUT
ADD
EN
IN1 OUT
OUT
MUL
EN
IN1 OUT
OUT
DIV
EN
IN1 OUT%AC1 %AC1 %VD200%VW90 %VD100 %VD200
AC1 4000
VW90 6000
VW90 10000
plus
equals
AC1 4000
200
800000
multiplied by
equals
VD100
VD100
4000
41.0
97.56098
divided by
equals
VD10
VD200
VD200
Add Multiply Divide
ENO ENO ENO
OUT
ADD
EN
IN1
IN2
OUT%AC1
%VW90
%VW90
ENOInput
Network 1
OUT
MUL
EN
IN1
IN2
OUT%AC1
%VD100
%VD100
ENO
OUT
DIV
EN
IN1
IN2
OUT
%VD10
%VD200
ENO
IN2 IN2 IN2%VW90 %VD100 %VD10
%VD200
Figure 10-7 Examples of Math Functions for LAD and FBD