F-1
S7-200 Programmable Controller System Manual
A5E00066097-02
Execution Times for STL Instructions
Effect of Power Flow on Execution Times
The calculation of the basic execution time for an STL instruction (Table F-4)
shows the time required for executing the logic, or function, of the instruction when
power flow is present (where the top-of-stack value is ON or 1). For some
instructions, the execution of that function is conditional upon the presence of
power flow: the CPU performs the function only when power flow is present to the
instruction (when the top-of-stack value is ON or 1). If power flow is not present to
the instruction (the top-of-stack value is OFF or 0), use a “no powerflow” execution
time to calculate the execution time of that instruction. Table F-1 provides the
execution time of an STL instruction with no power flow (when the top-of-stack
value is OFF or 0) for each S7-200 CPU module.
Table F-1 Execution Time for Instructions with No Power Flow
Instruction with No Power Flow
S7-200 CPU
All STL instructions 3 µs
Effect of Indirect Addressing on Execution Times
The calculation of the basic execution time for an STL instruction (Table F-4)
shows the time required for executing the instruction, using direct addressing of the
operands or constants. If your program uses indirect addressing, increase the
execution time for each indirectly addressed operand by the figure shown in
Table F-2.
Table F-2 Additional Time to Add for Indirect Addressing
Instruction for Indirect Addressing
S7-200 CPU
Each indirectly addressed operand 22 µs
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