Special Memory (SM) Bits
C-2
S7-200 Programmable Controller System Manual
A5E00066097-02
SMB1: Status Bits
As described in Table C-2, SMB1 contains various potential error indicators. These
bits are set and reset by instructions at execution time.
Table C-2 Special Memory Byte SMB1 (SM1.0 to SM1.7)
SM Bits
Description (Read Only)
SM1.0 This bit is turned on by the execution of certain instructions when the result of
the operation is zero.
SM1.1 This bit is turned on by the execution of certain instructions either when an
overflow results or when an illegal numeric value is detected.
SM1.2 This bit is turned on when a negative result is produced by a math operation.
SM1.3 This bit is turned on when division by zero is attempted.
SM1.4 This bit is turned on when the Add to Table instruction attempts to overfill the
table.
SM1.5 This bit is turned on when either LIFO or FIFO instructions attempt to read
from an empty table.
SM1.6 This bit is turned on when an attempt to convert a non-BCD value to binary is
made.
SM1.7 This bit is turned on when an ASCII value cannot be converted to a valid
hexadecimal value.
SMB2: Freeport Receive Character
SMB2 is the Freeport receive character buffer. As described in Table C-3, each
character received while in Freeport mode is placed in this location for easy access
from the ladder logic program.
Table C-3 Special Memory Byte SMB2
SM Byte
Description (Read Only)
SMB2 This byte contains each character that is received from Port 0 or Port 1 during
Freeport communication.
SMB3: Freeport Parity Error
SMB3 is used for Freeport mode and contains a parity error bit that is set when a
parity error is detected on a received character. As shown in Table C-4, SM3.0
turns on when a parity error is detected. Use this bit to discard the message.
Table C-4 Special Memory Byte SMB3 (SM3.0 to SM3.7)
SM Bits
Description (Read Only)
SM3.0 Parity error from Port 0 or Port 1 (0 = no error; 1 = error was detected)
SM3.1 to
SM3.7
Reserved
To Next Page
Loading...
