S7-200 Specifications
A-55
S7-200 Programmable Controller System Manual
A5E00066097-02
Figure A-29 shows a memory model of the V memory in a CPU 224 and the I/O
address areas of a DP master CPU. In this example, the DP master has defined
an I/O configuration of 16 output bytes and 16 input bytes, and a V memory offset
of 5000. The output buffer and input buffer lengths in the CPU 224 (determined
from the I/O configuration) are both 16 bytes long. The output data buffer starts at
V5000; the input buffer immediately follows the output buffer and begins at V5016.
The output data (from the master) is placed in V memory at V5000. The input data
(to the master) is taken from the V memory at V5016.
Note
If you are working with a data unit (consistent data) of three bytes or data units
(consistent data) greater than four bytes, you must use SFC14 to read the inputs
of the DP slave and SFC15 to address the outputs of the DP slave. For more
information, see the S
ystem Software for S7-300 and S7-400 System and
Standard Functions Reference Manual
.
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CPU 224
V memory
Offset:
5000 bytes
Output buffer
(Receive mailbox):
16 bytes
Input buffer
(Send mailbox):
16 bytes
CPU 315-2 DP
I/O address areas
I/O input area:
16 bytes
I/O output area:
16 bytes
VB0
VB5000
VB5015
VB5016
VB5031
VB5119
VB5032
P000
PI256
PI271
PQ256
PQ271
VB: variable memory byte P: peripheral
PI: peripheral input
PQ: peripheral output
VB4999
EM 277
PROFIBUS-DP
Module
Figure A-29 Example of a CPU 224 V Memory and I/O Address Area of a PROFIBUS-DP
Master
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