S7-200 Quick Reference Information
G-3
S7-200 Programmable Controller System Manual
A5E00066097-02
Table G-3 Summary of S7-200 CPU Memory Ranges and Features
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Range Limit
Accessible as ...
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Description
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CPU 221
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CPU 222
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CPU 224
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CPU 226
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Bit
Á
Byte
Á
Word
Á
Double
Word
User program size
2 Kwords
2 Kwords
4 Kwords
4 Kwords
User data size
1 Kwords
1 Kwords
2.5 Kwords
2.5 Kwords
Process-image input
register
I0.0 to I15.7
I0.0 to I15.7
I0.0 to I15.7
I0.0 to I15.7
Ix.y
IBx
IWx
IDx
Process-image
output register
Q0.0 to Q15.7
Q0.0 to Q15.7
Q0.0 to Q15.7
Q0.0 to Q15.7
Qx.y
QBx
QWx
QDx
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Analog inputs
(read only)
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--
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AIW0 to AIW30
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AIW0 to AIW62
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AIW0 to AIW62
Á
AIWx
Analog outputs (write
only)
--
AQW0 to
AQW30
AQW0 to
AQW62
AQW0 to
AQW62
AQWx
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Variable memory
(V)
1
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VB0.0 to
VB2047.7
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VB0.0 to
VB2047.7
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VB0.0 to
VB5119.7
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VB0.0 to
VB5119.7
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Vx.y
Á
VBx
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VWx
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VDx
Local memory (L)
2
LB0.0 to
LB63.7
LB0.0 to
LB63.7
LB0.0 to
LB63.7
LB0.0 to
LB63.7
Lx.y LBx LWx LDx
Bit memory (M)
M0.0 to M31.7
M0.0 to M31.7
M0.0 to M31.7
M0.0 to M31.7
Mx.y
MBx
MWx
MDx
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Special Memory
(SM)
Read only
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SM0.0 to
SM179.7
SM0.0 to
SM29.7
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SM0.0 to
SM179.7
SM0.0 to
SM29.7
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SM0.0 to
SM179.7
SM0.0 to
SM29.7
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SM0.0 to
SM179.7
SM0.0 to
SM29.7
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SMx.y
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SMBx SMWx SMDx
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Timers
Ret. on-delay 1 ms
Ret. on-delay 10 ms
Ret.
on-delay 100 ms
On/Off delay 1 ms
On/Off delay 10 ms
On/Off delay 100 ms
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256
(T0 to T255)
T0, T64
T1 to T4,
T65 to T68
T5 to T31,
T69 to T95
T32, T96
T33 to T36,
T97 to T100
T37 to T63,
T101 to T255
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256
(T0 to T255)
T0, T64
T1 to T4,
T65 to T68
T5 to T31,
T69 to T95
T32, T96
T33 to T36,
T97 to T100
T37 to T63,
T101 to T255
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256
(T0 to T255)
T0, T64
T1 to T4,
T65 to T68
T5 to T31,
T69 to T95
T32, T96
T33 to T36,
T97 to T100
T37 to T63,
T101 to T255
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256
(T0 to T255)
T0, T64
T1 to T4,
T65 to T68
T5 to T31,
T69 to T95
T32, T96
T33 to T36,
T97 to T100
T37 to T63,
T101 to T255
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Tx
Á
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Tx
Counters
C0 to C255
C0 to C255
C0 to C255
C0 to C255
Cx
Cx
High-speed counter
HC0, HC3.
HC4, HC5
HC0, HC3,
HC4, HC5
HC0 to HC5
HC0 to HC5
HCx
Sequential control
relays (S)
S0.0 to S31.7
S0.0 to S31.7
S0.0 to S31.7
S0.0 to S31.7
Sx.y
SBx
SWx
SDx
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Accumulator
registers
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AC0 to AC3
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AC0 to AC3
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AC0 to AC3
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AC0 to AC3
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ACx
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ACx
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ACx
Jumps/Labels
0 to 255
0 to 255
0 to 255
0 to 255
Call/Subroutine
0 to 63
0 to 63
0 to 63
0 to 63
Interrupt routines
0 to 127
0 to 127
0 to 127
0 to 127
PID loops
0 to 7
0 to 7
0 to 7
0 to 7
Port
Port 0
Port 0
Port 0
Port 0, Port 1
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1
All V memory can be saved to permanent memory.
2
LB60 to LB63 are reserved by STEP 7-Micro/WIN 32, version 3.0 or later.