IMACL P,loc32,*XAR7/++
6-100
IMACL P,loc32,*XAR7/++ Signed 32 X 32-Bit Multiply and Accumulate (Lower Half)
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
IMACL P,loc32,*XAR7 0101 0110 0100 1101
1100 0111 LLLL LLLL
1 Y N+2
IMACL P,loc32,*XAR7++ 0101 0110 0100 1101
1000 0111 LLLL LLLL
1 Y N+2
Operands
P
Product register
loc32
Addressing mode (see Chapter 5)
Note: The @ACC addressing mode cannot be used when the instruction is repeated. No
illegal instruction trap will be generated if used (assembler will flag an error).
*XAR7/++
Indirect program-memory addressing using auxiliary register XAR7,
can access full 4Mx16 program space range (0x000000 to 0x3FFFFF)
Description 32-bit x 32-bit signed multiply and accumulate. First, add the unsigned
previous product (stored in the P register), ignoring the product shift mode
(PM), to the ACC register. Then, multiply the signed 32-bit content of the
location pointed to by the “loc32” addressing mode by the signed 32-bit
content of the program-memory location pointed to by the XAR7 register.
The product shift mode (PM) then determines which part of the lower 38
bits of the 64-bit result are stored in the P register. If specified,
post-increment the XAR7 register by 1:
ACC = ACC + unsigned P;
temp(37:0) = lower_38 bits(signed [loc32]
* signed Prog[*XAR7 or XAR7++]);
if( PM = +4 shift )
P(31:4) = temp(27:0), P(3:0) = 0;
if( PM = +1 shift )
P(31:1) = temp(30:0), P(0) = 0;
if( PM = 0 shift )
P(31:0) = temp(31:0);
if( PM = −1 shift )
P(31:0) = temp(32:1);
if( PM = −2 shift )
P(31:0) = temp(33:2);
if( PM = −3 shift )
P(31:0) = temp(34:3);
if( PM = −4 shift )
P(31:0) = temp(35:4);
if( PM = −5 shift )
P(31:0) = temp(36:5);
if( PM = −6 shift )
P(31:0) = temp(37:6);
To Next Page
Loading...
Need help?
General
