QMACL P,loc32,*XAR7/++
6-301
OVM
If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
PM
The value in the PM bits sets the shift mode for the output operation from the
product register. If the product shift value is positive (logical left shift
operation), then the low bits are zero filled. If the product shift value is
negative (arithmetic right shift operation), the upper bits are sign extended.
Repeat This instruction is repeatable. If the operation follows a RPT instruction, then
it will be executed N+1 times. The state of the Z, N, C and OVC flags will
reflect the final result in the ACC. The V flag will be set if an intermediate
overflow occurs in the ACC.
Example
; Calculate sum of product using 32-bit multiply and retain
; high result:
; int32 X[N]; // Data information
; int32 C[N]; // Coefficient information (located in low 4M)
; int32 sum = 0;
; for(i=0; i < N; i++)
; sum = sum + ((X[i] * C[i]) >> 32) >> 5;
MOVL XAR2,#X ; XAR2 = pointer to X
MOVL XAR7,#C ; XAR7 = pointer to C
SPM −5 ; Set product shift to ”>> 5”
ZAPA ; Zero ACC, P, OVC
RPT #(N−1) ; Repeat next instruction N times
||QMACL P,*XAR2++,*XAR7++ ; ACC = ACC + P >> 5,
; P = (X[i] * C[i]) >> 32
; i++
ADDL ACC,P << PM ; Perform final accumulate
MOVL @sum,ACC ; Store final result into sum
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