QMPYAL P,XT,loc32
6-302
QMPYAL P,XT,loc32 Signed 32-bit Multiply (Upper Half) and Add Previous P
SYNTAX OPTIONS OPCODE OBJMODE RPT CYC
QMPYAL P,XT,loc32 0101 0110 0100 0110
0000 0000 LLLL LLLL
1 − 1
Operands P Product register
XT Multiplicand register
loc32 Addressing mode (see Chapter 5)
Description Signed 32-bit x 32-bit multiply and accumulate the previous product. Add the
previous signed product (stored in the P register), shifted as specified by the
product shift mode (PM), to the ACC register. In addition, multiply the signed
32-bit content of the XT register by the signed 32-bit content of the location
pointed to by the “loc32” addressing mode and store the upper 32−bits of the
64-bit result in the P register:
ACC = ACC + P << PM;
P = (signed T * signed [loc32]) >> 32;
Flags and
Modes
Z
After the addition, the Z flag is set if the ACC value is zero, else Z is cleared.
N
After the addition, the N flag is set if bit 31 of the ACC is 1, else N is cleared.
C
If the addition generates a carry, C is set; otherwise C is cleared.
V
If an overflow occurs, V is set; otherwise V is not affected.
OVC
If overflow mode is disabled; and if the operation generates a positive
overflow, then the counter is incremented. If overflow mode is disabled; and if
the operation generates a negative overflow, then the counter is
decremented.
OVM
If overflow mode bit is set; then the ACC value will saturate maximum
positive (0x7FFFFFFF) or maximum negative (0x80000000) if the operation
overflowed.
PM
The value in the PM bits sets the shift mode for the output operation from the
product register. If the product shift value is positive (logical left shift
operation), then the low bits are zero filled. If the product shift value is
negative (arithmetic right shift operation), the upper bits are sign extended.
Repeat This instruction is not repeatable. If this instruction follows the RPT
instruction, it resets the repeat counter (RPTC) and executes only once.
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