16-bit operation: An operation that reads or writes 16 bits.
software interrupt: An interrupt initiated by an instruction. See also hard-
ware interrupt.
SP: See stack pointer (SP).
SPA bit: See stack pointer alignment (SPA) bit.
ST0: See status registers ST0 and ST1.
ST1: See status registers ST0 and ST1.
stack : The C28x stack is a software stack implemented by the use of a stack
pointer (SP). The SP, a 16-bit CPU register, can be used to reference a
value in the first 64K words of data memory (addresses
00 0000
16
−00 FFFF
16
).
stack pointer (SP): A 16-bit CPU register that enables you to use any por-
tion of the first 64K words of data memory as a software stack. The SP
always points to the next empty location in the stack.
stack pointer alignment (SPA) bit: A bit in status register ST1 that indi-
cates whether an ASP instruction has forced the SP to align to the next
even address (SPA = 1).
stack-pointer indirect addressing mode: The indirect addressing mode
that references a data-memory value at the current position of the stack
pointer (SP). See also PAGE0 stack addressing mode.
status registers ST0 and ST1: These CPU registers contain control bits
that affect the operation of the C28x and contain flag bits that reflect the
results of operations.
STEP command: A debugger command that causes the debugger to
single-step through a program. The STEP1 command causes the de-
bugger to execute a single instruction.
stop mode: An emulation mode that provides complete control of program
execution. When the CPU is halted in stop mode, all interrupts (including
reset and nonmaskable interrupts) are ignored until the CPU receives a
directive to run code again. See also real-time mode.
suppress sign extension: Prevent sign extension from occurring during a
shift operation. See also sign extend.
SXM bit: See sign-extension mode (SXM) bit.
Glossary
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